NXP HEF4094BT 8-Stage Shift and Store Register SMD

The HEF4094B NXP Semiconductor is a serial shift register with eight stages. Each stage has a storage latch for strobing data from the serial input to the parallel buffered 3-state outputs QP0 to QP7. The parallel outputs can be directly connected to common bus lines. On positive-going clock transitions, data is shifted. When the strobe (STR) input is HIGH, the data in each shift register stage is transferred to the storage register. When the output enable (OE) signal is HIGH, data from the storage register appears at the outputs. Two serial outputs (QS1 and QS2) are provided for cascading multiple HEF4094B devices. To allow high-speed operation in cascaded systems with a fast clock rise time, serial data is available at QS1 on positive-going clock edges. On the next negative going clock edge, the same serial data is available at QS2. When the clock has a slow rise time, this is used for cascading HEF4094B devices.

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